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Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures.
Holger Blume
Daniel Becker
Lisa Rotenberg
Martin Botteck
Jörg Brakensiek
Tobias G. Noll
Published in:
J. Syst. Archit. (2007)
Keyphrases
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instruction set
embedded systems
functional verification
multimedia
memory hierarchy
online learning
power consumption
hybrid models
memory subsystem
neural network
input output
computer technology
high end
ibm power processor