Design of a low-power RNS-enhanced arithmetic unit.
Piotr PatronikStanislaw J. PiestrakPublished in: LASCAS (2016)
Keyphrases
- low power
- power consumption
- single chip
- low cost
- low power consumption
- logic circuits
- vlsi architecture
- high speed
- cmos technology
- power dissipation
- gate array
- mixed signal
- ultra low power
- real time
- digital signal processing
- vlsi implementation
- wireless transmission
- vlsi circuits
- efficient implementation
- video sequences