A Multi-Level FPGA Synthesis Method Supporting HDL Debugging for Emulation-Based Designs.
Wen-Jong FangPeng-Cheng KaoAllen C.-H. WuPublished in: ASP-DAC (1999)
Keyphrases
- high accuracy
- detection method
- fully automatic
- similarity measure
- segmentation method
- preprocessing
- pairwise
- significant improvement
- dynamic programming
- computational cost
- classification method
- clustering method
- detection algorithm
- signal processing
- experimental evaluation
- cost function
- support vector machine
- real time
- computationally efficient
- theoretical analysis
- prior knowledge
- evolutionary algorithm
- objective function
- decision trees
- high precision
- data sets