HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators.
Ayush ArunachalamShamik KunduArnab RahaSuvadeep BanerjeeSuriyaprakash NatarajanKanad BasuPublished in: ISQED (2021)
Keyphrases
- low power
- compression scheme
- single chip
- low cost
- high speed
- power consumption
- image compression
- data compression
- compression ratio
- compression algorithm
- vlsi architecture
- digital signal processing
- entropy coding
- low power consumption
- image sensor
- signal processor
- computing systems
- mixed signal
- logic circuits
- power reduction
- real time
- gate array
- cmos technology
- hardware and software
- digital camera
- computer vision
- power dissipation
- field programmable gate array
- wavelet transform
- multiscale