A Low Power, Scalable and Runtime Customizable Microprocessor Architecture for Image Processing.
Giuseppe NotarangeloFrancesco PappalardoElena SalursoElio GuidettiPublished in: J. Low Power Electron. (2007)
Keyphrases
- low power
- high speed
- vlsi architecture
- image processing
- low cost
- power consumption
- digital signal processing
- cmos technology
- mixed signal
- single chip
- nm technology
- vlsi circuits
- real time
- wireless transmission
- high power
- signal processor
- design methodology
- signal processing
- image processing algorithms
- image enhancement
- logic circuits
- low power consumption
- instruction set
- gate array
- power reduction
- computer vision
- power management
- low complexity
- pattern recognition
- delay insensitive
- multithreading
- cmos image sensor
- design considerations