A FPGA design for high speed feature extraction from a compressed measurement stream.

Dustin Richmond Ryan Kastner Ali Irturk John McGarry

Published in: FPL (2013)

Keyphrases

high speed
feature extraction
low power
real time
single chip
hardware design
low cost
image processing
design process
design principles
low power consumption
hardware architecture
engineering design
data compression
discriminant analysis
data acquisition
wavelet transform
user interface
preprocessing
case study