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EBASA: Error Balanced Approximate Systolic Array Architecture Design.
Sai Karthik Nandigama
Bindu G. Gowda
Prashanth H. C.
Madhav Rao
Published in:
ACM Great Lakes Symposium on VLSI (2023)
Keyphrases
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systolic array
reconfigurable architecture
data flow
parallel architecture
error rate
exact solution
databases
image sequences
error minimization
data sets
information systems
case study
image segmentation
higher order
prediction error
error analysis