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Rapid circuit-specific inlining tuning for FPGA high-level synthesis.

Daniel H. NoronhaJose P. PinillaSteven J. E. Wilton
Published in: ReConFig (2017)
Keyphrases
  • high level synthesis
  • high speed
  • parallel architecture
  • artificial intelligence
  • hardware implementation
  • hardware architectures
  • low cost
  • signal processing
  • fault tolerance
  • low power
  • virtual machine
  • hardware design