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Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation.
Evangelia Kasapaki
Martin Schoeberl
Rasmus Bo Sorensen
Christoph Thomas Muller
Kees Goossens
Jens Sparsø
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2016)
Keyphrases
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real time
network on chip
packet switched
multi processor
hardware architecture
efficient implementation
image processing
high speed
routing algorithm
network simulator
response time
massively parallel
software implementation
cmos technology