The Implementation of a Power Efficient BCNN-Based Object Detection Acceleration on a Xilinx FPGA-SoC.
Heekyung KimKen ChoiPublished in: iThings/GreenCom/CPSCom/SmartData (2019)
Keyphrases
- hardware implementation
- object detection
- hardware architecture
- high speed
- field programmable gate array
- fpga implementation
- dedicated hardware
- cost effective
- low power
- efficient implementation
- hardware and software
- hardware software co design
- hardware architectures
- power consumption
- face detection
- hardware design
- low cost
- image processing
- fpga device
- neural network
- hardware description language
- data sets
- real time
- scene understanding
- signal processing
- scene recognition
- object recognition
- highly optimized
- fpga technology