A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s.
Vojkan VidojkovicGiovanni MangravitiKhaled KhalafViki SzortykaKristof VaesenWim Van ThilloBertrand ParvaisMike LiboisSteven ThijsJohn R. LongCharlotte SoensPiet WambacqPublished in: ISSCC (2012)
Keyphrases
- low power
- high speed
- ultra low power
- cmos technology
- deblocking filter
- nm technology
- wireless transmission
- power consumption
- single chip
- low voltage
- power reduction
- low cost
- low power consumption
- mixed signal
- vlsi architecture
- real time
- logic circuits
- digital signal processing
- image sensor
- delay insensitive
- vlsi circuits
- silicon on insulator
- gate array
- focal plane
- metal oxide semiconductor
- wireless communication