A 10Gb/s analog equalizer in 0.18um CMOS.

Linghan Wu Ziqiang Wang Ke Huang Shuai Yuan Xuqiang Zheng Chun Zhang Zhihua Wang

Published in: ASICON (2013)

Keyphrases

computer simulation
analog vlsi
multipath
high speed
decision feedback
signal processing
network size
circuit design
vlsi architecture
analog circuits
multi channel
mixed signal
data sets
video sequences
computer vision
artificial intelligence
information retrieval
real world