Paged cache: an efficient partition architecture for reducing power, area and access time.
Yen-Jen ChangFeipei LaiPublished in: APCCAS (2) (2002)
Keyphrases
- multithreading
- memory access
- memory subsystem
- software architecture
- cache management
- memory hierarchy
- real time
- power reduction
- highly efficient
- access control
- search engine
- distributed object
- instruction set
- read write
- prefetching
- processing units
- access patterns
- secondary storage
- network architecture
- back end
- main memory
- management system