An integrated fault tolerance technique for combinational circuits based on implications and transistor sizing.
Ahmad T. SheikhAiman H. El-MalehPublished in: Integr. (2017)
Keyphrases
- fault tolerance
- high speed
- fault tolerant
- logic circuits
- low power
- power dissipation
- load balancing
- distributed systems
- circuit design
- distributed computing
- asynchronous circuits
- response time
- high availability
- group communication
- power consumption
- replicated databases
- peer to peer
- database replication
- mobile agents
- integrated circuit
- floating gate
- failure recovery
- high performance computing
- cmos technology
- low cost
- databases
- fault management
- wireless sensor
- cooperative
- database systems
- data sets
- database