Optimizing data flow graphs to minimize hardware implementation.
Daniel Gomez-PradoQian RenMaciej J. CiesielskiJérémie GuillotEmmanuel BoutillonPublished in: DATE (2009)
Keyphrases
- hardware implementation
- efficient implementation
- signal processing
- software implementation
- dedicated hardware
- hardware design
- field programmable gate array
- fpga implementation
- pipeline architecture
- image processing algorithms
- hardware architecture
- directly optimize
- memory management
- image binarization
- processing elements
- data processing
- high speed
- information systems
- real time