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On the design and implementation of a RISC processor extension for the KASUMI encryption algorithm.
Tomás Balderas-Contreras
René Cumplido
Claudia Feregrino Uribe
Published in:
Comput. Electr. Eng. (2008)
Keyphrases
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instruction set
hardware architecture
encryption algorithm
efficient implementation
computer architecture
single chip
computation intensive
intrusion detection
memory management