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Analyses and design of bias circuits tolerating output voltages above BV/sub CEO/.
Hugo Veenstra
G. A. M. Hurkx
Dave van Goor
Hans Brekelmans
John R. Long
Published in:
IEEE J. Solid State Circuits (2005)
Keyphrases
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knowledge based systems
design process
user interface
delay insensitive
computer aided
engineering design
machine learning
information systems
case study
trade off
design decisions
optimal design
circuit design
digital circuits
logic circuits
high level synthesis