A methodology for FPGA to structured-ASIC synthesis and verification.
Michael D. HuttonRichard YuanJay SchleicherGregg BaecklerSammy CheungKar Keng ChuaHee Kong PhooPublished in: DATE Designers' Forum (2006)
Keyphrases
- hardware implementation
- design methodology
- hardware architecture
- single chip
- field programmable gate array
- xilinx virtex
- low cost
- model checking
- high speed
- texture synthesis
- real world
- application specific integrated circuits
- structured data
- signal processing
- real time
- integrated circuit
- hardware design
- efficient implementation