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Design of a compact chip filter with two transmission zeros using 0.35 μm GaAs HBT.

Shanwen HuKaikai XuYunqing HuKejun WuJinchao QianYiting GaoDingzhou SongZixuan WangBo ZhouZhikuang CaiYufeng Guo
Published in: Microelectron. J. (2020)
Keyphrases
  • case study
  • high speed
  • user interface
  • circuit design
  • single chip
  • neural network
  • design methodology
  • high density
  • programmable logic
  • chip design