Optimized Design of Interconnected Bus on Chip for Low Power.
Donghai LiGuang-Sheng MaGang FengPublished in: IMSCCS (2) (2006)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- low cost
- cmos technology
- mixed signal
- power dissipation
- power consumption
- ultra low power
- logic circuits
- digital signal processing
- vlsi architecture
- nm technology
- high power
- vlsi circuits
- image sensor
- cmos image sensor
- power reduction
- gate array
- real time
- wireless transmission
- energy efficiency
- parallel processing
- signal processor
- dynamic range
- high density