50 kHz Pattern Recognition on the Large FPGA Processor Enable++.
Andreas KugelKlaus KornmesserRalf LayJozsef LudvigReinhard MännerKlaus-Henning NoffzStephan RühlM. SesslerHarald SimmlerHolger SingpielPublished in: FCCM (1998)
Keyphrases
- pattern recognition
- high speed
- single chip
- signal processing
- gate array
- digital signal
- systolic array
- computer vision
- image analysis
- neural network
- machine learning
- fpga device
- parallel architecture
- feature extraction
- low power
- xilinx virtex
- image processing
- real time
- parallel processing
- pattern recognition problems
- hardware implementation
- general purpose processors
- dimensionality reduction
- low cost
- general purpose
- verilog hdl
- field programmable gate array
- pattern classification
- support vector machine svm
- fuzzy sets
- dedicated hardware
- instruction set
- hardware design
- input output