Energy efficient 3D Hybrid processor-memory architecture for the dark silicon age.
Sobhan NiknamArghavan AsadMahmood FathyAmir-Mohammad RahmaniPublished in: ReCoSoC (2015)
Keyphrases
- energy efficient
- multi core architecture
- memory management
- wireless sensor networks
- energy consumption
- single instruction multiple data
- sensor networks
- memory access
- processing elements
- level parallelism
- high speed
- energy efficiency
- multithreading
- base station
- parallel architecture
- data dissemination
- routing protocol
- multi core processors
- instruction set
- data transmission
- associative memory
- real time
- parallel processing
- management system
- data collection
- cmos technology
- parallel processors
- digital signal processor
- mobile devices
- routing algorithm