Login / Signup
Decomposition of Dillon's APN Permutation with Efficient Hardware Implementation.
José Luis Imaña
Lilya Budaghyan
Nikolay S. Kaleyski
Published in:
WAIFI (2022)
Keyphrases
</>
hardware implementation
efficient implementation
signal processing
software implementation
field programmable gate array
hardware architecture
machine learning
image processing algorithms
fpga implementation
dedicated hardware
fpga technology
neural network
general purpose
hardware design