Low-power circuit advantages of the scaled accumulation FET.
R. MuraliLihui WangBlanca AustinJames D. MeindlPublished in: ISCAS (5) (2002)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- power reduction
- gate array
- low cost
- power dissipation
- delay insensitive
- vlsi circuits
- high power
- wireless transmission
- single chip
- chip design
- mixed signal
- vlsi architecture
- digital signal processing
- low power consumption
- nm technology
- energy dissipation
- circuit design
- signal processor
- embedded systems