Login / Signup
Area-Efficient Auto-Write-Terminate Circuit for NV Latch and Logic-In-Memory Applications.
Jagadish Rajpoot
Shivam Verma
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2023)
Keyphrases
</>
limited memory
digital circuits
high speed
logic programming
modal logic
real time
data structure
memory requirements
predicate logic
memory size
analog circuits
asynchronous circuits
delay insensitive