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Multi-Gb/s multi-mode LDPC decoder architecture for IEEE 802.11ad standard.

Sabooh AjazHanho Lee
Published in: APCCAS (2014)
Keyphrases
  • low density parity check
  • fpga implementation
  • ldpc codes
  • high speed
  • decoding algorithm
  • distributed source coding
  • motion estimation
  • error correction
  • distributed video coding
  • turbo codes