An A-SAR ADC circuit with adaptive auxiliary comparison scheme.

Suresh Koyada Abhilash Karnatakam Nagabhushana Stefan Leitner Haibo Wang

Published in: SoCC (2015)

Keyphrases

high speed
real time
analog circuits
data sets
multiresolution
edge detection
synthetic aperture radar
subband
sar images
circuit design
delay insensitive