An Efficient Hardware Accelerator for Structured Sparse Convolutional Neural Networks on FPGAs.
Chaoyang ZhuKejie HuangShuyuan YangZiqi ZhuHejia ZhangHaibin ShenPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
Keyphrases
- field programmable gate array
- convolutional neural networks
- hardware implementation
- embedded systems
- hardware architecture
- computing systems
- parallel computing
- programmable logic
- hardware software
- image processing algorithms
- real time
- structured data
- hardware design
- convolutional network
- fpga implementation
- digital signal processing
- computing power
- fpga technology
- parallel architectures
- reconfigurable hardware
- sparse data
- real world
- hardware and software
- high end
- digital circuits
- low cost
- image processing
- massively parallel
- efficient implementation
- smart camera
- vlsi implementation
- sparse representation
- signal processing
- general purpose processors