FPGA implementation of object recognition processor for HDTV resolution video using sparse FIND feature.
Yuri NishizumiGo MatsukawaKoichi KajiharaTaisuke KodamaShintaro IzumiHiroshi KawaguchiChikako NakanishiToshio GotoTakeo KatoMasahiko YoshimotoPublished in: SiPS (2017)
Keyphrases
- fpga implementation
- object recognition
- image features
- hardware implementation
- high definition
- high definition television
- video sequences
- real time
- video frames
- high speed
- high resolution
- multimedia
- video data
- video content
- parallel processing
- video conferencing
- field programmable gate array
- neural network
- graphical models
- object detection
- d objects
- feature vectors
- high dimensional
- computer vision
- low cost
- image analysis
- data flow
- video signals
- case study
- image processing