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A 12-bit 10-MS/s SAR ADC with a binary-window DAC switching scheme in 180-nm CMOS.
Yung-Hui Chung
Chia-Wei Yen
Pei-Kang Tsai
Published in:
Int. J. Circuit Theory Appl. (2018)
Keyphrases
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analog to digital converter
bit string
protection scheme
gray code
high speed
power consumption
binary representation
cmos technology
nm technology
flip flops
window size
sliding window
low cost
error correcting codes
multiscale
image sensor
random access memory
image reconstruction
parameter estimation