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Design and FPGA implementation of digit-serial FIR filters.

Javier VallsMarcos M. PeiróTrinidad SansaloniEduardo I. Boemo
Published in: ICECS (1998)
Keyphrases
  • fpga implementation
  • fir filters
  • hardware implementation
  • image enhancement
  • pattern recognition
  • image analysis
  • building blocks
  • image processing algorithms