Scheduling for input-queued packet switches by a re-configurable parallel match evaluator.
Spiridon F. BeldianuRoberto Rojas-CessaEiji OkiSotirios G. ZiavrasPublished in: IEEE Commun. Lett. (2010)
Keyphrases
- scheduling algorithm
- response time
- parallel machines
- packet loss
- scheduling problem
- identical machines
- batch processing machines
- neural network
- multiprocessor systems
- flow control
- real time database systems
- parallel processors
- shared memory
- parallel computing
- parallel processing
- precedence constraints
- round robin
- distributed memory
- parallel implementation
- flexible manufacturing systems
- packet scheduling
- end to end