A low power high bandwidth four quadrant analog multiplier in 32 nm CNFET technology
Ishit MakwanaVitrag ShethPublished in: CoRR (2012)
Keyphrases
- low power
- cmos technology
- high bandwidth
- mixed signal
- nm technology
- power consumption
- high speed
- vlsi architecture
- low cost
- low latency
- gate array
- single chip
- end to end
- image sensor
- low voltage
- cmos image sensor
- low power consumption
- high density
- logic circuits
- application specific
- digital signal processing
- power dissipation
- cost effective
- hardware implementation
- real time
- data processing
- parallel processing
- multi channel
- high end
- power reduction
- massively parallel
- key technologies