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SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology.
Saeed Seyedfaraji
Baset Mesgari
Semeen Rehman
Published in:
CoRR (2022)
Keyphrases
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cmos technology
low voltage
low power
power consumption
spl times
leakage current
random access memory
parallel processing
low cost
image sensor
mixed signal
high resolution
silicon on insulator
power management
power system
high speed
embedded dram
real time