Login / Signup
A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth Enhancement.
Reo Nagasue
Isamu Mizuno
Ryo Kishida
Tatsuya Iwata
Takefumi Yoshikawa
Published in:
ISCAS (2024)
Keyphrases
</>
high speed
image enhancement
feedback loop
fractional order
real time
data mining
image processing
computational complexity
video streaming
generation process