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A Variation-aware Hold Time Fixing Methodology for Single Flux Quantum Logic Circuits.
Xi Li
Soheil Nazar Shahsavani
Xuan Zhou
Massoud Pedram
Peter A. Beerel
Published in:
ACM Trans. Design Autom. Electr. Syst. (2021)
Keyphrases
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logic circuits
low power
functional decomposition
logic synthesis
image processing
gate array
neural network
pattern recognition
design methodology
tunnel diode