Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance.
Tudor MurganPetru Bogdan BacinschiAlberto García OrtizManfred GlesnerPublished in: PATMOS (2006)
Keyphrases
- high speed
- low power
- digital signal processing
- low cost
- encoding schemes
- single chip
- power consumption
- low power consumption
- real time
- vlsi circuits
- power reduction
- logic circuits
- encoding scheme
- vlsi architecture
- gate array
- embedded systems
- cmos technology
- image sensor
- image quality
- mixed signal
- data structure
- neural network