Digital PHY Design Methodologies for High-Speed and Low-Power Memory Interface.
Kwanyeob ChaeBilly KooJihun OhSanghune ParkJongshin ShinJaehong ParkPublished in: ISOCC (2018)
Keyphrases
- low power
- high speed
- design methodologies
- mixed signal
- gigabit ethernet
- design methodology
- low cost
- vlsi circuits
- power consumption
- power dissipation
- analog to digital converter
- high power
- single chip
- design process
- multiagent systems
- real time
- vlsi architecture
- user interface
- logic circuits
- wireless transmission
- low power consumption
- cmos image sensor
- cmos technology
- formal specification
- image sensor
- nm technology
- gate array
- signal processor
- data model
- multi agent
- case study