A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology.

Vikram Chaturvedi Bharadwaj Amrutur

Published in: VLSI Design (2011)

Keyphrases

low power
cmos technology
power consumption
high power
low cost
high speed
low power consumption
single chip
low voltage
adaptive neural
parallel processing
power dissipation
digital signal processing
vlsi architecture
signal to noise ratio
real time
mixed signal
embedded systems