Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV.
Dong Hyuk WooNak Hee SeongHsien-Hsin S. LeePublished in: IEEE Trans. Very Large Scale Integr. Syst. (2013)
Keyphrases
- dynamic random access memory
- embedded dram
- memory subsystem
- main memory
- random access memory
- memory hierarchy
- heterogeneous databases
- real time
- seamless integration
- memory access
- management system
- power consumption
- low voltage
- loosely coupled
- cmos technology
- low power
- heterogeneous data sources
- query processing
- instruction set
- data integration
- database
- ibm zenterprise
- software architecture
- distributed architecture
- data transmission