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A Scalable Pipelined Dataflow Accelerator for Object Region Proposals on FPGA Platform.
Wenzhi Fu
Jianlei Yang
Pengcheng Dai
Yiran Chen
Weisheng Zhao
Published in:
CoRR (2018)
Keyphrases
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object region
field programmable gate array
parallel architecture
parallel computing
data flow
reconfigurable hardware
hardware implementation
object boundaries
real time
target object
embedded systems
computer vision
d objects
computing systems
image processing algorithms
depth map
high resolution