Estimation of the weighted maximum switching activity in combinational CMOS circuits.
Fadi A. AloulAssim SagahyroonPublished in: ISCAS (2006)
Keyphrases
- analog vlsi
- high speed
- delay insensitive
- circuit design
- tunnel diode
- logic circuits
- asynchronous circuits
- vlsi circuits
- low cost
- low power
- estimation accuracy
- focal plane
- low voltage
- power consumption
- accurate estimation
- power dissipation
- cmos technology
- real time
- chip design
- neural network
- random access memory
- parameter estimation
- maximum number
- estimation algorithm
- human activities