A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture.
Michael HübnerPeter FiguliRomuald GirardeyDimitrios SoudrisKostas SioziosJürgen BeckerPublished in: IPDPS Workshops (2011)
Keyphrases
- hardware implementation
- field programmable gate array
- reconfigurable hardware
- systolic array
- hardware architecture
- embedded systems
- heterogeneous computing
- memory management
- hardware design
- hardware and software
- low cost
- software implementation
- hardware software
- xilinx virtex
- dedicated hardware
- fpga implementation
- hardware software co design
- compute intensive
- pipelined architecture
- digital signal
- reconfigurable architecture
- parallel architecture
- loosely coupled
- design methodology
- high end
- high speed
- data flow
- real time
- virtual reality
- signal processing
- fpga technology
- hardware architectures
- virtual environment
- power consumption
- fpga device
- virtual world
- general purpose processors
- parallel computing
- level parallelism
- augmented reality
- computation intensive
- management system
- efficient implementation
- processing elements
- general purpose