11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip.
Andrew S. CassidyJohn V. ArthurFilipp AkopyanAlexander AndreopoulosRathinakumar AppuswamyPallab DattaMichael V. DeBoleSteven K. EsserCarlos Ortega OteroJun SawadaBrian TabaArnon AmirDeepika BablaniPeter J. CarlsonMyron D. FlicknerRajamohan GandhasriGuillaume GarreauMegumi ItoJennifer L. KlamoJeffrey A. KusnitzNathaniel J. McClatcheyJeffrey L. McKinstryYutaka Y. NakamuraTapan K. NayakWilliam P. RiskKai SchleupenBen ShawJay SivagnanameDaniel F. SmithIgnacio TerrizzanoTakanori UedaDharmendra S. ModhaPublished in: ISSCC (2024)
Keyphrases
- neural network
- neural network model
- high speed
- artificial neural networks
- low cost
- recurrent neural networks
- cmos technology
- inference process
- fuzzy logic
- bayesian networks
- probabilistic inference
- pattern recognition
- analog vlsi
- vlsi implementation
- network architecture
- bayesian inference
- neural nets
- neural network is trained
- ibm zenterprise
- fault diagnosis
- metal oxide semiconductor
- silicon on insulator
- ibm power processor
- programmable logic
- real time
- learning vector quantization
- bp neural network
- prediction model
- feed forward
- self organizing maps
- back propagation
- operating system