A VLSI array architecture for realization of DFT, DHT, DCT and DST.
Koushik MaharatnaA. S. DharSwapna BanerjeePublished in: Signal Process. (2001)
Keyphrases
- discrete cosine transform
- discrete fourier transform
- processor array
- discrete cosine
- frequency domain
- transform domain
- vlsi architecture
- image compression
- fourier transform
- dct domain
- load balancing
- software architecture
- signal processing
- content addressable
- parallel algorithm
- management system
- vlsi design
- distributed systems
- design considerations
- vlsi implementation
- programmable logic
- discrete cosine transformation
- network architecture
- jpeg images
- dct coefficients
- real time
- spatial domain
- post processing
- high speed
- feature extraction
- image processing