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2-stage ESD protection circuit with high holding voltage and low trigger voltage for high voltage applications.
Byung-Seok Lee
Hee-Guk Chae
Yong-Seo Koo
Kyeong-Il Do
Jin-Woo Eo
Published in:
ICEIC (2019)
Keyphrases
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high voltage
operating conditions
partial discharge
phase locked loop
high levels
normal operation
low voltage
high speed
neural network
decision making
expert systems
decision support system
duty cycle