Advanced architecture optimisation and performance analysis of a reconfigurable grid ALU processor.
Sascha UhrigRalf JahrTheo UngererPublished in: IET Comput. Digit. Tech. (2012)
Keyphrases
- systolic array
- computation intensive
- instruction set
- floating point
- functional units
- parallel architecture
- heterogeneous computing
- hardware implementation
- reconfigurable architecture
- service architecture
- grid enabled
- multi objective evolutionary
- industry standard
- grid systems
- grid computing
- grid services
- multi processor
- grid technology
- central processing unit
- digital signal
- xilinx virtex
- parallel processing
- management system
- memory management
- low cost
- high speed
- software architecture
- multithreading
- loosely coupled
- web services
- general purpose processors
- peer to peer
- data flow
- virtual organization
- level parallelism
- distributed memory
- single chip
- parallel processors
- processing elements
- dynamic reconfiguration
- genetic algorithm