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A 1.8 GHz subsampling CMOS downconversion circuit for integrated radio applications.

Ellie CijvatPatrik ErikssonN. TanHannu Tenhunen
Published in: ICECS (1998)
Keyphrases
  • high speed
  • circuit design
  • analog vlsi
  • delay insensitive
  • low power
  • vlsi circuits
  • cmos technology
  • low voltage
  • power consumption
  • ensemble methods
  • low cost
  • wireless communication
  • digital circuits