Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits.
Martin RozkovecPublished in: DDECS (2008)
Keyphrases
- hardware implementation
- hardware architecture
- fpga technology
- software implementation
- parallel architecture
- dedicated hardware
- hardware software co design
- hardware architectures
- fpga implementation
- xilinx virtex
- reconfigurable hardware
- field programmable gate array
- fpga device
- hardware design
- high level synthesis
- high speed
- hardware and software
- architectural design
- signal processing
- layered architecture
- power reduction
- circuit design
- management system
- logic synthesis
- neural network
- design considerations
- low cost
- real time
- single chip
- associative memory
- efficient implementation
- software architecture
- pipelined architecture
- vlsi implementation
- instruction set
- hardware software
- delay insensitive
- design methodology
- parallel implementation
- image processing
- built in self test