A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in Network-on-Chip based applications.

Phi-Hung Pham Phuong Mau Chulwoo Kim

Published in: CICC (2009)

Keyphrases

network on chip
interconnection networks
packet switched
routing algorithm
fault tolerant
parallel algorithm
multistage

network simulator
response time
multi processor
message passing
data transfer
ad hoc networks

communication networks
shared memory
parallel computers
distributed systems
routing protocol
energy consumption

multi hop
cmos technology
design process
shortest path
low cost
real time